1. Field of the Invention
The present invention is related generally to host-adapter systems for information sharing between intelligent devices connected to a common data exchange bus such as a local area network (LAN) and more specifically to host-adapter systems for shared data exchange between a bus of a first device and a second bus, such as the Small Computer System Interface (SCSI) bus, to which one or more other devices are connected.
2. Description of the Related Art
Personal computers (PC's), sometimes referred to as microcomputers, have gained widespread use in recent years primarily because they are inexpensive and yet powerful enough to handle computationally-intensive user applications. The data storage and data sharing capabilities of personal computers are often expanded by coupling a group of such computers to peripheral devices such as disk drives, tape drives, and printers. The peripheral devices and the personal computers are interconnected through a single communications network, e.g., a local area network.
The Small Computer System Interface (SCSI) standard, which is specified by the American National Standards Institute (ANSI X3.131-1986, which is incorporated herein by reference in its entirety) of 1430 Broadway, New York, N.Y. 10018, is an example of an industry-recognized standard for a relatively complex local area network. Descriptions of the SCSI bus may be found for example in U.S. Pat. No. 4,864,291 "SCSI Converter" issued Sep. 5, 1989 to J. E. Korpi and in U.S. Pat. No. 4,905,184 "Address Control System for Segmented Buffer Memory" issued Feb. 27, 1990, to R. P. Giridhar, et al., which are incorporated herein by reference in their entirety.
A typical SCSI system 100 is illustrated in FIG. 1. A plurality of intelligent devices 120, 140, 141, 142 are coupled to SCSI bus 110 so that these devices can exchange information. The intelligent devices are a first host system 120, whose internal structure is shown in detail, a second host system 140, whose internal structure is similar to that shown for system 120, a first disk drive unit (Target-A) 141, and a second disk drive unit (Target-B) 142.
Communications over SCSI bus 110 begin when one of devices 120, 140 initiates a data transfer. A typical data transfer operation has seven SCSI "phases": (1) ARBITRATE, (2)SELECT, (3)MESSAGE(out), (4)COMMAND, (5) DATA, (6) STATUS and (7) MESSAGE(in).
The operation of the SCSI phases for data transfer is well-known to those skilled in the art. Briefly, during the ARBITRATE phase, competing host systems 120 and 140 decide which system gains exclusive control of SCSI bus 110. During the SELECT phase, the winning host designates one of the other devices as a "target". After selection of the target, a command is issued from the host to specify the details of the data transfer, such as direction, length, and address of the data in the target. Data is transferred over the SCSI bus 110 either synchronously or asynchronously in blocks of, for example, 512 bytes each at a speed up to 5 megabytes (Mbytes) per second.
The host and target exchange handshakes for each byte of data transferred over the SCSI bus. When the target anticipates a time delay in the data stream, the chosen target disconnects (in the logic sense) from SCSI bus 110, and the winning host relinquishes control over SCSI bus 110. This leaves SCSI bus 110 in a Bus-Free state, permitting other SCSI transfer operations to take place over bus 110. The data transfer operations can be either single-threaded (one host-target pair is active at a time) or multi-threaded (one host initiates transfers with many targets concurrently).
System 120 typically includes a second generation microprocessor 121, e.g., a 80286.TM. microprocessor available from Intel Corp. of California, mounted on a printed-circuit motherboard 120a. The second generation microprocessor 121 (which will be referred to as the "host microprocessor") has a sixteen-bit wide data bus D and typically operates at a peak speed of approximately 10-12 million cycles per second.
Motherboard 120a also includes an optional math coprocessor 122, a host clock generating circuit 123 which normally includes an oscillator crystal 124 of fixed frequency, an interface circuit 125 that includes (i) address buffers 125a for coupling microprocessor address bus A to a 24-bit address bus portion 126a of expansion bus 126, (ii) data buffers 125b for coupling microprocessor data bus D to a 16-bit expansion data bus portion 126b, (iii) a bus controlling circuit 125c for coupling microprocessor control bus C to expansion bus control lines 126c and (iv) memory data buffers 125d for coupling microprocessor data bus D to an expansion memory data bus 126d, a plurality of expansion card connectors or "slots" 127, a main memory system 130 including a nonvolatile read-only memory (ROM) 130a and dynamically-refreshed random-access memory (DRAM) 130b, a memory address multiplexer 132, a DMA controller 135 coupled to a DMA bus 136, local buffers 137, and page register 138. The operation and interaction of the components on motherboard 120a is known to those skilled-in-the art. Electrical power (e.g., +5 volts D.C.) is provided to host motherboard 120a and the expansion boards by an internal power supply 128.
A SCSI host-adapter board 160 is shown plugged into one of slots 127 of host system 120. Typically, board 160 includes a microprocessor 161 that usually is a first generation microprocessor (e.g., an Intel 8086.TM. microprocessor) which has an eight-bit data bus and operates at a peak speed of approximately 10 MHz or less. The data processing resources of microprocessor 161, also referred to as adapter microprocessor 161, are devoted to managing SCSI bus data transfers.
In addition to adapter microprocessor 161, host-adapter board 160 typically includes a firmware ROM chip 165 for storing initialization and operational firmware used by adapter microprocessor 161. Host-adapter board 160 also includes a BIOS ROM chip 162 for storing initialization and operational software used by host microprocessor 121. In addition, board 160 includes several interface circuits. For example, a slot interface circuit 163 interfaces adapter board 160 to expansion slots 127. A SCSI bus interface circuit 164 interfaces board 160 to SCSI bus 110.
High speed firmware circuits 165, i.e., an Adaptec AIC-6250 available from Adaptec, Inc. of Milpitas, Calif., an NCR 5380 or an NCR 5390 chip, both available from NCR of Colorado Springs, Colo., are provided on host-adapter board 160 for handling functions that are too fast for adapter microprocessor 161. An on-board clock generating circuit 166 supplies a synchronizing clock signal to other components on adapter board 160. The components on adapter board 160 receive electrical power from power supply 128 of host system 120.
SCSI interface arrangement 100 is advantageous because there is minimal interference with application programs running on host microprocessor 121. Typically, host-adapter board 160 transfers data between SCSI bus 110 and memory 130 using a bus-master technique. In this technique, adapter board 160 forces microprocessor 121 into a temporary wait state and then takes control of expansion bus 126 and optionally also DMA bus 136. Bursts of data are transferred over SCSI bus 110 and expansion bus 126 to memory 130. Application programs running on microprocessor 121 are not affected by the data transfer because the state of the host microprocessor 121 is unchanged after host-adapter board 160 relinquishes control of expansion bus 126 and releases host microprocessor 121 from its wait state.
While the advantages of SCSI are widely recognized, host-adaptor board 160 limits the applications of SCSI. Most motherboards have a limited number of slots 127 and introduction of board 160 into one of the slots may eliminate another board that is needed by the user. Further, small portable computers may not have any expansion slots and so connection of such computers to either a SCSI network or SCSI peripherals is not possible. SCSI adapter board 160 typically includes a number of high cost devices which make the SCSI adapter board itself expensive.
Among the high cost devices is the host/adapter microprocessor (H/A .mu.P) whose resources are exclusively dedicated to SCSI adapter functions. The need for a dedicated microprocessor in conjunction with the other circuits described above essentially eliminates the possibility of replacing the host adapter card with an application specific integrated circuit (ASIC). ASICs have been successfully used to reduce the number of integrated circuits required, for example, on the mother board of a computer, but typically the microprocessor has remained as an independent chip.
Unfortunately, even with a reduction of the number of integrated circuits on the motherboard of a computer, there is not sufficient room on the motherboard for the components on the SCSI host/adaptor board. Therefore, a computer with a empty expansion slot and the SCSI host/adaptor card are needed to take advantage of SCSI. A method is needed for reducing the cost of using the SCSI standard so that computer owners with limited budgets and small portable computers can take advantage of the standard.